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imp006 Pin Mux

The Functions Available From The imp006’s Pins

The imp006 provides an extensive array of GPIO and standard buses, including seven UARTs, four SPI buses and three I²C buses.

The module adopts the same pin nomenclature as the imp003. Squirrel code written to address pins and/or peripherals on other imps will require modification for use with the imp006.

Pin Mux

GPIO and peripheral functionality is organized into three groups of pins.

Pins A-W

Pin uart
ABCD
uart
PQRS
spi
EFGH
i2c
JK
i2c
TU
i2c
LM
PWM ADC DAC Wake State-change
Callback
A TX
B RX Yes
C RTS
D CTS
E COPI Yes
F CIPO Yes Yes
G SCK
H CS Yes
J SCL Yes
K SDA
L SCL
M SDA
N Yes Yes
P TX
Q RX
R RTS* Yes
S CTS* Yes
T SCL Yes Yes
U SDA Yes
V Yes Yes
W Yes Yes Yes

* See Known Issues.

Pins XA-XW

Pin uart
XEFGH
uart
XJKLM
spi
XABCD
spi
XPQRS
spi
XTUVW
PWM ADC DAC Wake State-change
Callback
XA COPI Yes Yes
XB CIPO Yes Yes
XC SCK Yes Yes
XD CS Yes Yes
XE TX
XF RX
XG RTS* Yes
XH CTS* Yes
XJ TX
XK RX
XL RTS*
XM CTS* Yes
XN Yes Yes
XP COPI
XQ CIPO
XR SCK
XS CS
XT COPI Yes
XU CIPO
XV SCK
XW CS

* See Known Issues.

Pins YA-YN

Pin uart
YABCD
uart
YEFGH
uart
YJKLM
PWM ADC DAC Wake State-change
Callback
YA TX
YB RX
YC RTS*
YD CTS* Yes
YE TX
YF RX
YG RTS*
YH CTS* Yes
YJ TX
YK RX
YL RTS*
YM CTS* Yes

* See Known Issues.

Notes

imp006 Identification

Call imp.info() — it returns a meta object with the property type, which is a string containing the imp module name:

if (imp.info().type == "imp006") {
   // Code is running on imp006...
}

Note Please use imp.net.info() to determine the specific network interfaces attached to your imp006.

Default Pin States

All pins default to tristate (floating).

Reading Bus Names

Bus names prefixed with X or Y should be read with that prefix being applied to all of the subsequent pins included in the bus name, not just the first. For example, spiXPQRS indicates that this SPI bus uses pins XP, XQ, XR and XS, not pins XP, Q, R and S or pins X, P, Q, R and S.

CIPO is the signal previously referred to as MISO. COPI is the signal previously referred to as MOSI.

Pin Layout

The following figure shows the imp006 pinout top view:


 
Click for full-size image

DFSDM

Support for Digital Filter for Sigma-Delta Modulators (DFSDM) is available on pins P (DATA) and Q (CLOCK). For more information, please see the imp API DFSDM documentation.

Known Issues

UART Flow Control

Currently only uartABCD provides full flow control.

Other four-pin UARTs (uartPQRS, uartXEFGH, uartXJKLM, uartYABCD, uartYEFGH and uartYJKLM) do not yet provide flow control and must be used with the flag NO_CTSRTS. Flow control on these UARTs is expected to be added in a future version of impOS.