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Design Hardware With The imp006

Required Components, Board Layout Recommendations And Best Practices

The imp006 provides support for multiple network technologies by decoupling the network hardware from the imp module. Customers can connect a range of network subsystems to the imp006 and, through Squirrel, control which of these is used to deliver Internet connectivity at any given time. This grants customers the ability to tailor the network technologies they support to their application’s particular use-cases.

This guide provides the hardware designer with the information they require to successfully integrate an imp006 and at least one network sub-system into their own device.

Note The principles and practices discussed in this guide are embodied in the imp006 Breakout Board reference design. You should consult the imp006 Breakout Board’s schematics, Altium and Gerber files for guidance on designing your own imp006-based hardware.

Contents

Important Design Notes

impOS 41

Using the imp006 requires impOS™ 41 or above. Release 41 is a development version made available to early imp006 adopters. All other customers and developers will be able to use the imp006 with the release of impOS 42, the operating system’s next major public release.

imp006 Variants

The imp006 is based on the STM32F413ZHJ6 MCU. Installing impOS| , a process called ‘impification’, turns the STM32F413ZHJ6 into an imp006. See First Power Up for more information. The imp006 is made available in three variants according to the wireless components it will be connected to:

Variant Device ID starts with WiFi Module Cellular Module
imp006a 0x600a Murata 1MW
Dual-band: 2.4GHz/5GHz
Quectel BG96, optional
imp006b 0x600b Murata 1DX
Single-band: 2.4GHz
Quectel BG96, optional
imp006c 0x6000 None Quectel BG96, mandatory

Note Both Murata 1xx parts also provide Bluetooth LE and this is accessible in Squirrel via the imp API.

The appropriate encrypted firmware variant should be installed on an external SPI flash. The STM32F413ZHJ6 will verify the firmware and copy it to its internal flash. This occurs at first boot in the customer’s factory. From this point onward, the module is an imp006 of the specified type. It cannot be changed to another type. All subsequent boots execute the internal firmware.

Customers who do not expect to make a large volume of builds can order pre-programmed imp006s direct from Electric Imp.

The imp006a and imp006b detect modem presence by checking for a pull-down on CELL_PWR_EN at boot time. If no modem is fitted, this line must be pulled up to the IO supply. The imp006c variant expects a modem to be present.

First Power Up

In order for an STM32F413ZHJ6 to be turned into an imp006, it must undergo the impification process. This takes place the first time the MCU is powered up, and reads the appropriate image from the external QSPI flash. At is at this time that the imp006 personality (006a, b or c) is permanently set by the image loaded.

The impification process is only initiated by a specific STM32F413ZHJ6 SKU. This has been pre-programmed with the impOS loader, called the fastROM. At each boot, the fastROM checks for the presence of the SPI flash storage and a valid encrypted impROM image within it. If the fastROM verifies the impROM, it copies the impROM to the STM32F413ZHJ6 internal flash and restarts the MCU, which will now boot impOS as an imp006.

If any of these checks and processes fail, the STM32F413ZHJ6 will not have become an imp006. Such failure is signalled by the fastROM on the BlinkUp status LED: it is lit solid red for two seconds. At the end of that time, the fastROM causes the MCU to reboot.

When the impification process is successful, the imp006 will present the standard BlinkUp status codes as appropriate: it will first show flashing amber to indicate that it is ready for BlinkUp.

Impification And The Factory Process

The impification process typically takes 20-40 seconds, so you should allow for this in your manufacturing process. Once impification has been completed successfully, the imp006 will reboot into a ‘raw’ imp state: the status LED will be flashing amber to signal that it is ready for factory BlinkUp. No network connectivity is required for impification.

GPIO and Standard Peripheral Bus Support

Please see the imp006 pin mux page.

Pin Layout

The following figure shows the imp006 pinout top view:


 
Click for full-size image

The following tables show how the STM32F413ZHJ6’s pins map to imp006 pins as referenced by the imp API (green). For specific imp pin functions, please see the imp006 pin mux. Grid references are based on the co-ordinate system used in the diagram above.

Pins marked in blue have specific imp-related functions which are not exposed to Squirrel. Please see the imp006 Breakout Board schematic for further details.

Grey references are STM32F413ZHJ6 GPIO pins that are reserved for possible impOS use.

Pins marked in red and black are, respectively, STM32F413ZHJ6 power and other function pins. Please see the STM32F413ZHJ6 datasheet for more information.

STM Grid Ref. impOS Func. STM Grid Ref. impOS Func. STM Grid Ref. impOS Func.
A1 Reserved B1 OSC32_IN C1 OSC32_OUT
A2 pinYG B2 pinXS C2 VBAT
A3 pinXR B3 pinXQ C3 pinM
A4 pinYA B4 pinXP C4 pinL
A5 pinYB B5 pinU C5 pinT
A6 Reserved B6 pinXF C6 pinXE
A7 Reserved B7 BTUART_CTS C7 BTUART_TX
A8 pinB B8 pinYJ C8 pinYK
A9 pinXH B9 pinA C9 pinC
A10 Reserved B10 SDIO C10 SDIO
A11 Reserved B11 SDIO C11 VDDUSB
A12 Reserved B12 USB_DATA + C12 USB_DATA -

 

STM Grid Ref. impOS Func. STM Grid Ref. impOS Func. STM Grid Ref. impOS Func.
D1 OSC_IN E1 OSC_OUT F1 NRST
D2 VSS E2 pinYM F2 QSPI
D3 VDD E3 RDTR F3 QSPI
D4 pinYL E4 RAPRDY F4 VDD
D5 BOOT0 E5 PDR_ON F5 VDD
D6 pinR E6 VSS F6 VDD
D7 RMODULEOE E7 VSS F7 VDD
D8 BTREGON E8 BTUART RX F8 VDD
D9 pinS E9 SDIO F9 VDD
D10 pinP E10 pinQ F10 VDD
D11 RUART2_TX E11 SDIO F11 SDIO
D12 RUART2_TX E12 Reserved F12 pinK

 

STM Grid Ref. impOS Func. STM Grid Ref. impOS Func. STM Grid Ref. impOS Func.
G1 RWDIS H1 pinV J1 VSSA
G2 QSPI H2 RRING J2 pinW
G3 QSPI H3 pinF J3 pinXD
G4 VSS H4 pinE J4 Reserved
G5 VDD H5 BYPASS_REG J5 Reserved
G6 VDD H6 VSS J6 pinYE
G7 VDD H7 VCAP_1 J7 RDCD
G8 VSS H8 pinXW J8 pinXV
G9 VCAP_2 H9 RUART1_CTS J9 pinXL
G10 VSS H10 BTDW J10 RV_BUFF
G11 BTUART_RTS H11 QSPI J11 PSU_EN
G12 pinJ H12 BTHW J12 OPTO_BIAS

 

STM Grid Ref. impOS Func. STM Grid Ref. impOS Func. STM Grid Ref. impOS Func.
K1 VREF — L1 VREF + M1 VDDA
K2 RESCUE L2 pinN M2 pinXN
K3 pinXC L3 pinXB M3 pinXA
K4 RVUSB L4 OPTO_IN M4 QSPI
K5 RPWRON L5 RRST M5 RUSBBT
K6 pinYF L6 RSTATUS M6 RPSM
K7 pinYH L7 pinXJ M7 pinXK
K8 pinXU L8 pinXT M8 pinYC
K9 RUART1_RX L9 RUART1_TX M9 pinS
K10 pinXM L10 RUART1_RTS M10 pinXG
K11 WLREGON L11 RED LED M11 pinH
K12 pinYD L12 GREEN LED M12 pinG

 

Default Pin States

All pins default to tristate high impedance (floating).

The Rescue Pin

The imp006 pin RESCUE (PA1) may be used as an application rescue pin. If impOS has been set to Rescue Mode, RESCUE is sampled during a cold boot and its state determines whether Squirrel starts immediately (pin state high, the default) or after a ten-second period during which impOS attempts to connect to the impCloud and check for updated Squirrel (pin state low).

Rescue Mode is intended only for products which need Squirrel to run as quickly as possible en the device is connected to power: impOS will start Squirrel immediately upon a cold boot. Rescue Mode is not enabled by default and can only be enabled by calling imp.enablerescuepin() within Device Under Test (DUT) factory firmware.

When Rescue Mode is enabled, if RESCUE is externally driven low at cold boot, typically via an end-user activated push-button, then impOS will temporarily revert to the standard boot pattern: it will connect to the impCloud and check for updated Squirrel before it loads the Squirrel virtual machine.

RESCUE must be held high through a pull-up as its default, no-rescue state.

Device-side Data Persistence And nv Support

Customers who have built imp-based products before may have made use of nv, a Squirrel table that is automatically persisted in RAM when certain imps are put into deep sleep, and automatically re-instantiated when the imp wakes.

If you are building an imp006-based product, please be aware that nv is not available with this module. To persist data across deep sleeps, consider writing the information to the SPI flash connected to the imp: either the area made available to the application or the user configuration space available within the impOS-controlled area of the SPI flash. Up to 4KB (4096 bytes) of data may be stored in the latter; the space available in the application area will depend upon the size of SPI flash included in your design.

Unlike nv, these areas have the benefit that they will be preserved during power loss.

Required Components

Your design will require the following in addition to the imp006 module.

1. BlinkUp Reception Circuitry

The required circuit is very simple: you just need a phototransistor and a resistor.

  • Your phototransistor must be able to sense visible light. Do not use a phototransistor with a visible-light filter.
  • The value of the bias resistor used in the BlinkUp detection circuit will depend greatly on your mechanical design and on the opto-electrical components you have selected. This value will need to be tuned to suit your design — please follow the guide How to Design and Tune Your BlinkUp Circuit. A larger value for RBIAS will result in a larger signal during BlinkUp, but also makes your design more susceptible to saturation from ambient light. A smaller value reduces sensitivity to ambient light, but will produce a smaller signal during BlinkUp. A 22-68kΩ resistor is a good place to start tuning.

2. Bi-color (Red/Green) LED

This LED uses different color patterns to show different status conditions — see BlinkUp Status Codes for more information.

  • Your LED configuration needs to be able to produce three colors: red, green and amber. Most designs use a single bi-color LED to achieve this; some use two discrete LEDs and a lightpipe.
  • A 10kΩ resistor is required in parallel with the red side of the bi-color LED to allow the imp006 to detect LED polarity.
  • You may use either a common-cathode or a common-anode LED in your design; the imp006 will detect the LED polarity via the 10kΩ resistor. Two-pin (“either-or”) bi-color LEDs are not supported: it must be possible to turn red and green on at the same time.

3. 64Mbit SPI Flash

An external 64Mb (8MB) SPI flash part is mandatory. The address space above 0x400000 (4096KB) can be used by your application through the imp API’s Spiflash class. Areas below this address will be erased and reprogrammed by the OS, so applications using pre-programmed SPI flash components must not use space below this address.

The following SPI flash parts are directly supported:

Part Name Chip ID Notes
Macronix MX25R64xx C2-28-17 Quad-read supported
Old Macronix parts with tRES1 > 100µs may not work
Cypress S25F064L 01-60-17 Quad-read supported
Winbond W25Q64JV EF-40-17 Quad-read supported

Other SPI flashes should also work, although in 1-bit-wide mode only, provided they:

  • Are 64Mbit (8MB) in size.
  • Support 4KB, 32KB and 64KB erases (commands 0x20, 0x52, 0xD8).
  • Either support deep-power-down using commands 0xB9 (sleep) and 0xAB (wake), or ignore those two commands.

To reduce noise in the system, source termination resistors are recommended.

4. 32kHz Crystal

The imp006 does not include an internal timing crystal to run the internal Real-Time-Clock (RTC) while it is in deep sleep. If your design requires that the imp006 be capable of low-power deep sleep, it must include the crystal so that the imp can set timers and use them as a wake source. If no crystal is being used, you should ground the OSC32_IN pin.

A 32kHz crystal is also mandatory if your design is based on the imp006a variant as the 1MW module requires the 32kHz LPO clock to be driven.

Note Make sure the crystal has a load capacitance of 6pF and that suitably sized load capacitors are used. Higher capacitor values may prevent the oscillator from starting up. For more information, please see the STMicro Application Note Oscillator design guide. impOS configures the STM32 32kHz oscillator to high drive mode.

Cellular

Currently, the imp006 supports only the Quectel BG96.

The imp006’s pin CELL_POWER_EN (PG13) must be pulled low on imp006 variants that are fitted with a cellular modem.

Note Devices based on these variants that have no modem, must pull CELL_POWER_EN high (to the STM32 I/O power domain).

CELL_POWER_EN is sampled without any STM-internal pullup or pulldown to determine imp006 type, meaning the pulldown will not burn significant power when the cell power is enabled.

CELL_POWER_EN is driven high 50ms before R_VBUFF (PG4) to begin the modem power-on sequence. If the modem pin VMOD is power-gated, it must be operated by CELL_POWER_EN (active high).

CELL_POWER_EN and R_VBUFF are tristated at the end of the modem power-off sequence.

If level-shifters are needed on the STM32-modem connection, CELL_POWER_EN is suitable to be used to enable them, even though it is driven before R_VBUFF. R_VBUFF is suitable in this case for directly powering the level-shifters.

Note If your cellular module is a Quectel BG96, the imp006 pin R_PWRON (PF13) provides an open-drain output suitable for the BG96’s PWRKEY input, which is not 3V3 tolerant. R_PWRON is typically tristated, but is pulsed low during modem power-on and power-off sequences.

WiFi

Currently, the imp006 supports the Murata 1MW module for dual-band (2.4GHz and 5GHz) WiFi and the Murata 1DX for single-band (2.4GHz) WiFi.

If a WiFi module is fitted, ie. the imp006 as of an imp006a or imp006b variant, then pins SDIO_CMD (PD2), SDIO_D0, SDIO_D1, SDIO_D2 and SDIO_D3 (PC8-PC11) must have be connected via external pull-up resistors to the WiFI module power domain.

No pull-ups are needed if no WiFi module is fitted, ie. imp006 variant imp006c.

Note The sixth SDIO signal, SDIO_CLK (PC12) does not need a pull-up.

The pin WIFIBLE_POWER_EN (PG3) is driven high when access to WiFi or Bluetooth LE is required. It is tristated at all other times.

If the chosen WiFi module is power-gated, or if a boost-converter is needed to achieve 3V3, then it must be operated by WIFIBLE_POWER_EN (active high). Unlike previous imps, the imp006 does not use WIFIBLE_POWER_EN for accesses to external SPI flash, which is assumed to be in the same power domain as the STM32.

WIFIBLE_POWER_EN is not used for cell-modem power..

The pin WL_REG_ON (PD14) is driven high during the WiFi power-on sequence, 20ms after WIFIBLE_POWER_EN. It is driven low during the WiFi power-off sequence. It is therefore suitable for a Murata 1MW or 1DX module WL_REG_ON inputs.

Important We strongly recommend that you read Murata’s Type 1MW Application Note if you are planning to build a product incorporating imp006 and dual-band WiFi. The equivalent Application Note for single-band WiFi can be found here.

Bluetooth

Bluetooth LE on the imp006 is provided by either of the Murata 1MW or 1DX modules for which the imp006 is specified.

The imp006’s pin BT_REG_ON (PG10) is driven high during the Bluetooth power-on sequence (20ms after WIFIBLE_POWER_EN) and driven low during the Bluetooth power-off sequence. This makes it suitable for connection to Murata 1MW and 1DX modules’ BT_REG_ON inputs.

PCB Layout Guidelines

It is very important that your design follows a few simple rules when it comes time to place and route your printed circuit board in order to take advantage of the imp006’s simplicity and maximize performance.

1. Minimize impedance to ground

The imp006’s ground pins should have a clear path back to ground, without running through many narrow traces or bottlenecking at a single via. While a via may be rated for much more DC current than your design calls for, the impedance of the ground path needs to be as low as possible to prevent noise from becoming a problem in your design. This applies to other parts of your design as well, so minimize ground impedance everywhere.

  • Flood ground on the top and bottom of your PCB to provide a good ground path to all components. The imp006’s antenna tuning ‘expects’ a ground pour under the non-antenna portion of the imp006 to act as an antenna ground plane. If the ground pour is omitted, the antenna will be de-tuned, which will negatively impact range and performance, and may prevent your product from passing wireless certifications.
  • Stitch ground planes around the edge of your board and throughout the interior of the board. Use more vias than you need for the DC current your circuit requires; this will lower the impedance of the ground paths and reduce noise.

2. Place bypass and filter capacitors as close to VDD pins as possible

Bypass capacitors will dump noise to ground, but if the trace on the filtered side is long, it presents an opportunity for that trace to pick up noise again.

3. Do not tie VDD pins together directly

Use “V” routes to connect power pins to power planes even if they are adjacent to each other.

4. Pull back ground around 32kHz crystal on top layer and layer 2

The parasitic capacitance of a nearby ground plane may exceed the required load capacitance for your 32kHz crystal (if used). To avoid de-tuning the crystal — which can severely affect performance or prevent the imp006 from operating entirely — pull ground pours back around the 32kHz crystal and crystal load capacitors.

A poorly-routed switching power supply will send noise all over the board and severely impact performance and range. This is easily avoided by following the recommended layout in the datasheet for nearly any switching power supply IC.

Noise on your board directly diminishes WiFi performance and can prevent you from passing FCC certifications. Keep all noisy parts (switching power supplies, high-speed signalling) as far from the imp006’s antenna as possible.

6. Prioritize your signal routings

Routing signals in the correct order can significantly simplify a design:

  • Place your power supply and route VDD It’s generally a good idea to avoid vias on your power supply rail; these increase the impedance of the trace and create an opportunity for noise to impact your design.
  • Route high-speed signals directly and avoid vias By keeping the path between devices that communicate over a high-speed interface such as SPI direct and short, you minimize the possibility that noise will couple into the line, or that the signals on the line will couple into other parts of your design as noise.
  • Keep analog signals clear of noisy digital signals, and route them as directly as you can Routing an analog signal right next to a digital signal creates an opportunity for digital noise to couple into the analog signal. Keep them apart and pour ground in between to provide some shielding.
  • Route GPIOs last A signal which is simply used to poll a button or toggle an LED does not need special considerations. If a GPIO signal crosses a higher-priority signal such as a SPI bus or an analog line, the lower-priority signal should via around the higher-priority one.

PCB Requirements

Because a board incorporating the imp006 must include a microstrip transmission line from the imp006 to the antenna, a four-layer PCB is required in order to achieve 50Ω impedance control of the RF trace.

RF Trace Routing

Layer Stackup

Modular pre-certification has been performed with the layer stackup shown below. If a different layer stackup is used, modular certification may not be used. Note that changing the layer stackup will also affect the values of the RF matching components and possibly the dimensions of the RF trace in order to maintain a 50Ω characteristic impedance.

RF Traces

The RF traces must be a 50Ω±2Ω impedance controlled transmission line which is referenced to a solid, unbroken ground. The trace width and distance to the ground plane must be adjusted to achieve the target impedance. Each trace should not have sharp changes in direction and should use curved traces when needed. You will need to tell your PCB vendor which trace requires impedance control and ask for per-lot testing and reports to ensure that they are meeting the requirements.

PCB WiFi BLE Antenna

The antenna must be placed at the edge/corner of the PCB, with a copper keep-out under the entire antenna element on all PCB layers. No other traces or components may be placed in this region. A row of stitching vias is required along the edge of the ground pour below the antenna section; this ground pour, including the vias, is part of the antenna. The module, antenna, and RF trace must all be placed on the top layer of the board.

The antenna may be mirrored (left/right) as required for mechanical design as long as the dimensions of the antenna are preserved and all other design rules are followed. Please consult the Gerber files for the imp006 breakout board to obtain the exact measurements, and the BoM for the exact component part numbers that are used within the antenna pattern. You should not substitute any other parts.

If the antenna is on the corner of the board, ensure that there is >=16mm between the antenna edge and the nearest ground plane (or board edge) horizontally.

Note Murata has valuable advice on antenna design for the 1MW dual-band WiFi module here, and for the 1DX single-band WiFi module here.

LED Error Codes

If an STM32F413ZHJ6 that is intended to become an imp006 is unable to detect the connected SPI flash storage from which it expects to read the encrypted impROM firmware image, or the flash is present but the firmware is missing or fails cryptographic checks, then the STM32F413ZHJ6’s pre-imp firmware will signal this state on the BlinkUp status LED. The pattern it presents is two seconds of solid red. After this the MCU reboots, so the effect will be a slow red blink.

fastROM SPI flash not found  2000ms Reboot

For more information, see First Power Up, above.

Further Reading

Murata Documentation

Type 1MW

Type 1DX

STMicro Documentation