#ifndef CYGONCE_HAL_PLATFORM_INTS_H
#define CYGONCE_HAL_PLATFORM_INTS_H
//==========================================================================
//
//      hal_platform_ints.h
//
//      HAL Interrupt and clock support
//
//==========================================================================
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//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):    msalter
// Contributors: gthomas
// Date:         2000-10-10
// Purpose:      Define Interrupt support
// Description:  The interrupt details for the NPWR Linux Engine are defined here.
// Usage:
//               included from <cyg/hal/hal_var_ints.h>
//               ...
//              
//####DESCRIPTIONEND####
//
//==========================================================================

#define CYGNUM_HAL_INTERRUPT_TIMER        CYGNUM_HAL_INTERRUPT_XINT3_BIT0 // external timer
#define CYGNUM_HAL_INTERRUPT_ETH0         CYGNUM_HAL_INTERRUPT_XINT3_BIT1 // primary enet
#define CYGNUM_HAL_INTERRUPT_SCSI         CYGNUM_HAL_INTERRUPT_XINT3_BIT2 // 53c1000 SCSI
#define CYGNUM_HAL_INTERRUPT_SERIAL_B     CYGNUM_HAL_INTERRUPT_XINT3_BIT3 // 16x50 uart B
#define CYGNUM_HAL_INTERRUPT_ETH1         CYGNUM_HAL_INTERRUPT_XINT3_BIT4 // secondary enet

// The vector used by the Real time clock
#define CYGNUM_HAL_INTERRUPT_RTC        CYGNUM_HAL_INTERRUPT_TIMER
//#define CYGNUM_HAL_INTERRUPT_RTC        CYGNUM_HAL_INTERRUPT_PMU_CCNT_OVFL

#endif // CYGONCE_HAL_PLATFORM_INTS_H

// EOF hal_platform_ints.h
