//=============================================================================
//
//      mod_regs_cac.h
//
//      CAC (cache) Module register definitions
//
//=============================================================================
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//=============================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):   jskov
// Contributors:jskov, nickg
// Date:        2000-10-30
//              
//####DESCRIPTIONEND####
//
//=============================================================================

// Besides the below, cache sizes are defined in the CPU variant module
// headers (mod_77xx.h).

//--------------------------------------------------------------------------
// Cache registers
#define CYGARC_REG_CCR                  0xFF00001C

#define CYGARC_REG_CCR_IIX              0x00008000  // IC index enable
#define CYGARC_REG_CCR_ICI              0x00000800  // IC invalidation
#define CYGARC_REG_CCR_ICE              0x00000100  // IC Enable
#define CYGARC_REG_CCR_OIX              0x00000080  // OC index enable
#define CYGARC_REG_CCR_ORA              0x00000020  // OC RAM enable
#define CYGARC_REG_CCR_OCI              0x00000008  // OC Invalidation
#define CYGARC_REG_CCR_CB               0x00000004  // Copy-Back enable
#define CYGARC_REG_CCR_WT               0x00000002  // Write Through enable
#define CYGARC_REG_CCR_OCE              0x00000001  // OC Enable

#ifdef CYGPKG_HAL_SH_202
#define CYGARC_REG_CCR_EMODE            0x80000000  // Enhanced mode
#else
#define CYGARC_REG_CCR_EMODE            0x00000000  // No enhanced mode
#endif

#define CYGARC_REG_CCR_CE               0x00000101  // IC, OC Enable
#define CYGARC_REG_CCR_CF               0x00000808  // IC, OC Invalidation

